Vectorizing Unicode conversions on real RISC-V hardware (camel-cdr.github.io)

Screenshot of camel-cdr.github.io: Vectorizing Unicode conversions on real RISC-V hardware

First screen, captured 2 years ago.

Looks similar

Screenshot of camel-cdr.github.io: RISC-V Vector benchmark results

RISC-V Vector benchmark results (camel-cdr.github.io)

22 points by camel-cdr 3 years ago | 10 comments

Screenshot of op-co.de: Reverse-engineering Fujitsu M7MU RELC hardware compression

Reverse-engineering Fujitsu M7MU RELC hardware compression (op-co.de)

29 points by ge0rg 1 year ago | 2 comments

Screenshot of open-std.org: C++ proposal: There are exactly 8 bits in a byte

C++ proposal: There are exactly 8 bits in a byte (open-std.org)

240 points by Twirrim 2 years ago | 264 comments

Screenshot of www-user.tu-chemnitz.de: Encoding x86 Instructions

Encoding x86 Instructions (www-user.tu-chemnitz.de)

80 points by st_goliath 1 year ago | 27 comments

Screenshot of susam.net: Fixed Bits of Version 4 UUID (2015)

Fixed Bits of Version 4 UUID (2015)(susam.net)

27 points by susam 3 years ago | 17 comments

Screenshot of sagipolaczek.github.io: NeuralSVG: An Implicit Representation for Text-to-Vector Generation

NeuralSVG: An Implicit Representation for Text-to-Vector Generation (sagipolaczek.github.io)

726 points by lnyan 1 year ago | 69 comments

Project page for NeuralSVG, a research method from Tel Aviv University and MIT CSAIL that generates layered SVG vector graphics from text prompts using an implicit neural representation.

neuralsvg text-to-vector svg-generation implicit-neural-representation

Looks similar

RISC-V Vector benchmark results(camel-cdr.github.io)

Reverse-engineering Fujitsu M7MU RELC hardware compression(op-co.de)

C++ proposal: There are exactly 8 bits in a byte(open-std.org)

Encoding x86 Instructions(www-user.tu-chemnitz.de)