SiFive: The road ahead (post layoffs)(sifive.com)

76 points by fork-bomber 3 years ago | 78 comments

RISC-V is now officially supported by CPython(blog.python.org)

288 points by lumpa 2 months ago | 52 comments

Your MCU likely escaped the eMudhra intermediate CA compromise(danielmangum.com)

47 points by hasheddan 5 days ago | 28 comments

Blog post explaining why microcontroller-based IoT devices are likely unaffected by the eMudhra intermediate CA private key compromise, due to minimal pinned root CA bundles.

What's new for RISC-V in LLVM 17(muxup.com)

37 points by todsacerdoti 3 years ago | 22 comments

VPR: Nordic's First RISC-V Processor(danielmangum.com)

147 points by hasheddan 1 year ago | 33 comments

Igalia, Servo, and the Sovereign Tech Fund(igalia.com)

379 points by robin_reala 1 year ago | 59 comments

Igalia announcement dated Oct 9, 2025 about Sovereign Tech Fund investment in the Servo web engine for accessibility, embeddability, and sustainability.