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Screenshot of divagr.com: Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5

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Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5

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Blog post describing Qwenputer, a Qwen3.5 4B model with a RISC-V CPU compiled into its weights that uses Gated DeltaNet layers as RAM to run code internally.

What HN thinks

Delighted horror as a $20k GPU cluster is lovingly repurposed into a slow RISC-V box that, naturally, runs DOOM.

Gloriously cursed, and it runs DOOM
Most commenters treat it as a fun, impressive hack, joking about DOOM, RAM prices, and LLMs all the way down.
Promising for model architecture research
Some see value in baking frozen compute or memory layers into models, differentiable CPUs, or scratch-training with built-in tools, possibly helping continual learning.
Overhyped or pointless roundabout
Skeptics note it needs a custom host runtime that skips Qwen's own layers, isn't 100% accurate, and is a Rube Goldberg version of older work like Neural Turing Machines.

Consensus: Commenters broadly agree it is a clever, entertaining experiment. They do not agree on whether it is practically useful or truly runs without an external runtime.

Recommended in the comments

Loom ↗ (other): Its author says it does similar work with far fewer layers and can run Doom.
neuron-explorer ↗ (tool): Cited as the source of the single-neuron 'evil Qwen' steering finding.
How Transformer LLMs Work ↗ (other): Suggested as a starting point for learning LLM basics in a weekend.
Orthogonal Subspace Finetuning ↗ (library): Offered as a way to fine-tune without overwriting important existing weights, such as an embedded CPU.

Summarised by Claude from the comment thread 15 hours ago.

Points: 666
Comments: 140
Best rank: #1
Posted: 2026-10-29 by csmantle
Category: Ai ml

qwen risc-v gated-deltanet compiled-weights llm-internals transformers ai-safety

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