Pharo 14(pharo.org)
11 points by xkriva11 | 0 comments
Official announcement of the Pharo 14 release, detailing new development tools, refactoring infrastructure, and virtual machine improvements such as RISC-V JIT support.
#risc-v on Hacker News
21 stories tagged risc-v, newest first.
Show HN: A Truly Modular Keyboard(github.com)
221 points by NotARoomba | 70 comments
GitHub repository for Keybytes, an open-hardware modular keyboard where each key is its own PCB with a RISC-V MCU, connected via pogo pins and magnetic cases.
LLMs are making formal software verification feasible at a much larger scale(anthropic.com)
429 points by johnbender | 265 comments
Anthropic research post describing how Claude produced formal proofs of crash-freedom for RISC-V binaries of 123 OSS-Fuzz open-source libraries, finding bugs along the way.
Ship Your Interpreter(basis.ai)
18 points by gopiandcode | 7 comments
Basis blog post describing using LLMs to write a formal semantics for a small language and Lean to prove its interpreter correct down to RISC-V compiled code.
Ubuntu 26.10 (Stonking Stingray) released(lists.ubuntu.com)
42 points by dgavrilov | 39 comments
Mailing list announcement of the Ubuntu 26.10 "Stonking Stingray" release, covering Rust coreutils, Linux kernel 7.3, GNOME 51, TPM encryption, and RISC-V images.
Show HN: Our space game has a built-in RISC-V emulator that runs Linux(againstallodds.games)
59 points by nor-and-or-not | 26 comments
Blog post from indie studio Against All Odds about PasRISCV, the RISC-V emulator running Linux inside their space terraforming game SEEDS.
A third world engineer responds to “RISC-V: They should have known better”(rvembedded.com)
589 points by Narishma | 304 comments
A blog post on rvembedded.com responding to criticism of RISC-V; the captured page shows a rate limit exceeded error instead of the article.
RISC-V: They Should Have Known Better(dmitry.gr)
357 points by dmitrygr | 402 comments
Blog essay by Dmitry Grinberg critiquing the RISC-V instruction set architecture, covering optionality, missing features, and its instruction encoding.
ESP32-S31(espressif.com)
341 points by volemo | 181 comments
Espressif product page for the ESP32-S31, a dual-core RISC-V SoC with multi-protocol wireless connectivity and HMI features.
Baochip-1x: What it is, why I'm doing it now and how it came about(crowdsupply.com)
326 points by timhh | 71 comments
A Crowd Supply project update by Andrew 'bunnie' Huang explaining the Baochip-1x RISC-V microcontroller with mostly open RTL, why he is launching it now, and its origins.
Vibe Code Warning – A personal casestudy(github.com)
325 points by jackdoe | 240 comments
GitHub repository pico2-swd-riscv, a library for debugging the RISC-V cores of the Raspberry Pi Pico 2 over SWD, shared as a vibe-coding case study.
Easy RISC-V(dramforever.github.io)
367 points by todsacerdoti | 70 comments
Easy RISC-V is an interactive tutorial on RISC-V assembly programming with an in-browser emulator, covering instructions, jumps, branches, and memory.
Let's Help NetBSD Cross the Finish Line Before 2025 Ends(mail-index.netbsd.org)
365 points by jaypatelani | 196 comments
A NetBSD-users mailing list post urging donations to the NetBSD Foundation, which had raised $10,738 of its $50,000 goal for 2025, to fund RISC-V and Wi-Fi work.
SkiftOS: A hobby OS built from scratch using C/C++ for ARM, x86, and RISC-V(skiftos.org)
444 points by ksec | 89 comments
Homepage of SkiftOS, a hobby operating system written from scratch in C/C++ targeting ARM, x86, and RISC-V, showing its desktop and terminal.
Operating System in 1,000 Lines – Intro(operating-system-in-1000-lines.vercel.app)
942 points by ingve | 108 comments
Intro chapter of an online book that walks through building a small RISC-V operating system from scratch in about 1,000 lines of C.
Box64 and RISC-V in 2024: What It Takes to Run the Witcher 3 on RISC-V(box86.org)
332 points by pabs3 | 122 comments
A Box64 project blog post describing the work needed to run x86_64 games like The Witcher 3 on RISC-V hardware via the Box64 emulator.
A new RISC-V Mainboard from DeepComputing(frame.work)
504 points by jiripospisil | 139 comments
Framework blog post announcing a RISC-V mainboard for the Framework Laptop 13 developed by DeepComputing.
Barcelona Supercomputing Center presents Sargantana: new open-source RISC-V chip(bsc.es)
343 points by pimterry | 138 comments
Barcelona Supercomputing Center news release announcing Sargantana, a new generation of its open-source RISC-V chips designed in Spain.
The risk of RISC-V: What's going on at SiFive?(morethanmoore.substack.com)
379 points by klelatti | 288 comments
Ian Cutress's More Than Moore Substack post reporting on major changes at RISC-V company SiFive, based on multiple sources.
Show HN: RISC-V assembly tabletop board game (hack your opponent)(punkx.org)
372 points by throwaway71271 | 41 comments
Project page for Overflow, a tabletop and web board game where players write RISC-V assembly and exploit buffer overflows to hack opponents.
Pineapple ONE: open-source 32 bit RISC-V CPU that you can make at home(pineapple-one.github.io)
449 points by todsacerdoti | 57 comments
Project homepage for Pineapple ONE, an open-source 32-bit RISC-V CPU designed to be built at home, with links to GitHub, Twitter and Discord.